This invention relates to electronic devices comprising a matrix of cells each with a thin-film transistor (hereinafter termed TFT). The device may be a flat panel display (for example, an active-matrix liquid-crystal display), or another type of large-area electronic device (for example, a large-area image sensor or touch sensor, or a thin-film data store or memory device). The invention also relates to methods and layouts for manufacturing such devices.
There is much interest in developing thin-film circuit devices with TFTs and/or other thin-film semiconductor circuit elements on insulating substrates for large-area electronics applications. These circuit elements fabricated with portions of an amorphous or polycrystalline semiconductor film may form the switching elements in a cell matrix, for example in a flat panel display as described in U.S. Pat. No. 5,130,829 (our reference PHB 33646), the whole contents of which are hereby incorporated herein as reference material.
In order to reduce the number of photolithographic steps in fabricating a top-gate TFT, it is advantageous to use a simplified process such as a "two-mask step" (hereinafter termed "2-MS") technology as disclosed in the 1987 paper "Very simple a-Si:H TFT fabrication process for LCD-TV application" by M. le Contellec et al., published in J. Non-Crystalline Solids Vol. 97 & 98 (1987) pages 297ff. Similar 2-MS technology is described in United States Patent specification U.S. Pat. No. 5,238,861. The whole contents of this J. Non-Crystalline Solids 1987 paper and U.S. Pat. No. 5,238,861 are hereby incorporated herein as reference material. When this technology is used to fabricate top-gate switching TFTs of a matrix, the semiconductor thin-film pattern, typically of a-Si:H (hydrogenated amorphous silicon), not only provides the channel regions of the TFTs but extends also below (and has the same layout pattern as) each of the gate lines which provide the row conductors of the matrix. Thus, each row conductor comprises the highly conductive top-gate film pattern (typically of aluminium) on an insulating thin-film pattern (which also provides the gate dielectric) on the semiconductor thin-film pattern.
In the display devices disclosed in U.S. Pat. No. 5,238,861, each cell also has a storage capacitor formed by a lower conductive film part present under either a capacitive line or the row conductor of a neighbouring cell. These storage capacitors are provided to increase the charge retention time of the pixel, so countering discharge by leakage currents associated with the switching TFT and the liquid crystal medium of the display. The lower conductive film part of the storage capacitor is present under the insulating and semiconductor film patterns of the capacitive line or the row conductor of the neighbouring cell.